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this is information on a product in full production. january 2014 docid022743 rev 1 1/27 tsv521, tsv522, tsv524, tsv521a, tsv522a, tsv524a high merit factor (1.15 mhz for 45 a) cmos op amps datasheet - production data features ? gain bandwidth product: 1.15 mhz typ. at 5 v ? low power consumption: 45 a typ. at 5 v ? rail-to-rail input and output ? low input bias current: 1 pa typ. ? supply voltage: 2.7 to 5.5 v ? low offset voltage: 800 v max. ? unity gain stable on 100 pf capacitor ? automotive grade benefits ? increased lifetime in battery powered applications ? easy interfacing with high impedance sensors related products ? see tsv631, tsv632, tsv634 series for lower minimum supply voltage (1.5 v) ? see lmv821, lmv822, lmv824 series for higher gain bandwidth products (5.5 mhz) applications ? battery powered applications ? portable devices ? automotive signal conditioning ? active filtering ? medical instrumentation description the tsv52x and tsv52xa series of operational amplifiers offer low volt age operation and rail-to- rail input and output. the tsv521 device is the single version, the tsv522 device the dual version, and the tsv524 device the quad version, with pinouts compatible with industry standards. the tsv52x and tsv52xa series offer an outstanding speed/power consumption ratio, 1.15 mhz gain bandwidth product while consuming only 45 a at 5 v. the devices are housed in the smallest industrial packages. these features make the tsv52x, tsv52xa family ideal for sensor in terfaces, battery supplied and portable applications. the wide temperature range and high esd tolera nce facilitate their use in harsh automotive applications. tssop14 miniso8 sc70-5 df n 8 2x2 qf n16 3x3 table 1. device summary standard v io enhanced v io single tsv521 tsv521a dual tsv522 tsv522a quad tsv524 tsv524a www.st.com
contents tsv52x, tsv52xa 2/27 docid022743 rev 1 contents 1 package pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 absolute maximum ratings and operating c onditions . . . . . . . . . . . . . 4 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.1 operating voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.2 common-mode voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.3 rail-to-rail input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.4 rail-to-rail output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.5 driving resistive and capacitive loads . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.6 input offset voltage drift over temperature . . . . . . . . . . . . . . . . . . . . . . . . 15 4.7 long term input offset voltage drift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.8 pcb layouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.9 macromodel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.1 sc705 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.2 dfn8 2x2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.3 miniso8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.4 qfn16 3x3 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.5 tssop14 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
docid022743 rev 1 3/27 tsv52x, tsv52xa package pin connections 27 1 package pin connections figure 1. pin connections for each package (top view) 1. the exposed pads of the dfn8 (2x2) and qfn16 (3x3) can be connected to vcc- or left floating. in4- out4 out1 in1- 13 14 15 16 vcc in1+ 1 vcc in4+ 12 nc vcc+ 2 3 nc nc vcc- 10 11 in2+ 4 9 in3+ 5 6 7 8 in2- out2 out3 in3- out1 vcc+ 1 8 in1- 2 out2 7 in1+ 3 in2- 6 in1+ in2 3 5 vcc 4 in2 6 in2+ 5 vcc- 4 out1 vcc+ 1 8 in1- 2 out2 7 in1+ 3 in2- 6 nc in1+ 3 in2- 6 in2+ 5 vcc- 4 in+ vcc+ 1 5 vcc- 2 in- out 3 4 tsv522 dfn8 tsv524 tssop14 tsv521 sc70-5 tsv524 qfn16 tsv522 miniso8
absolute maximum ratings and operating conditions tsv52x, tsv52xa 4/27 docid022743 rev 1 2 absolute maximum ratings and operating conditions table 2. absolute maximum ratings (amr) symbol parameter value unit v cc supply voltage (1) 1. all voltage values, except differential voltage s are with respect to network ground terminal. 6 v v id differential input voltage (2) 2. differential voltages are the non inverting input term inal with respect to the inverting input terminal. v cc v in input voltage (3) 3. v cc - v in must not exceed 6 v, v in must not exceed 6 v. v cc- - 0.2 to v cc+ + 0.2 i in input current (4) 4. input current must be limited by a resistor in series with the inputs. 10 ma t stg storage temperature -65 to +150 c r thja thermal resistance junction-to-ambient (5)(6) sc70-5 dfn8 2x2 qfn16 3x3 miniso8 tssop14 5. short-circuits can c ause excessive heating and destructive dissipation. 6. r th are typical values. 205 57 45 190 100 c/w t j maximum junction temperature 150 c esd hbm: human body model (7) 7. human body model: 100 pf discharged through a 1.5 k resistor between two pins of the device, done for all couples of pin combinations with other pins floating. 4kv mm: machine model (8) 8. machine model: a 200 pf cap is charged to the spec ified voltage, then discharged directly between two pins of the device with no external se ries resistor (internal resistor < 5 ), done for all couples of pin combinations with other pins floating. 300 v cdm: charged device model (9) (all packages except sc70-5 and dfn8) 9. charged device model: all pins plus package ar e charged together to the specified voltage and then discharged directly to ground. 1.5 kv cdm: charged device model (sc70-5 and dfn8) (9) 1.3 latch-up immunity 200 ma table 3. operating conditions symbol parameter value unit v cc supply voltage 2.7 to 5.5 v v icm common-mode input voltage range v cc- - 0.1 to v cc+ + 0.1 t oper operating free air temperature range -40 to +125 c
docid022743 rev 1 5/27 tsv52x, tsv52xa electrical characteristics 27 3 electrical characteristics table 4. electrical characteristics at v cc+ = +2.7 v with v cc- = 0 v, v icm = v cc /2, t = 25 c, and r l = 10 k connected to v cc /2 (unless otherwise specified) symbol parameter conditions min. typ. max. unit dc performance v io offset voltage tsv52xa, t = 25 c 800 v tsv52xa, -40 c < t < 125 c 2600 tsv52x, t = 25 c 1.5 mv tsv52x, -40 c < t < 125 c 3.3 v io / t input offset voltage drift -40 c < t < 125 c (1) 318v/c i io input offset current (v out = v cc /2) t = 25 c 1 10 (3) pa -40 c < t < 125 c 1 100 (3) i ib input bias current (v out = v cc /2) t = 25 c 1 10 (3) -40 c < t < 125 c 1 100 (3) cmr common-mode rejection ratio 20 log ( v ic / v io ) v ic = -0.1 v to v cc +0.1v, v out = v cc /2, r l = 1 m t = 25 c 50 72 db -40 c < t < 125 c 46 a vd large signal voltage gain v out = 0.5 v to (v cc - 0.5v), r l = 1 m t = 25 c 90 105 -40 c < t < 125 c 60 v oh high level output voltage t = 25 c -40 c < t < 125 c 335 50 mv v ol low level output voltage t = 25 c -40 c < t < 125 c 635 50 i out i sink v out = v cc , t = 25 c 12 22 ma v out = v cc , -40 c < t < 125 c 8 i source v out = 0 v, t = 25 c 12 18 v out = 0 v, -40 c < t < 125 c 8 i cc supply current (per channel) v out = v cc /2, r l > 1 m t = 25 c 30 51 a -40 c < t < 125 c 30 51 ac performance gbp gain bandwidth product r l = 10 k , c l = 100 pf 0.62 1 mhz f u unity gain frequency 900 khz m phase margin 55 degrees g m gain margin 7 db sr slew rate r l = 10 k , c l = 100 pf, v out = 0.5 v to v cc - 0.5 v 0.74 v/s
electrical characteristics tsv52x, tsv52xa 6/27 docid022743 rev 1 e n equivalent input noise voltage f = 1 khz f = 10 khz 61 43 thd+n total harmonic distortion + noise follower configuration, f in = 1 khz, r l = 100 k , v icm = v cc /2, bw = 22 khz, v out = 1 v pp 0.003 % table 4. electrical characteristics at v cc+ = +2.7 v with v cc- = 0 v, v icm = v cc /2, t = 25 c, and r l = 10 k connected to v cc /2 (unless otherwise specified) (continued) symbol parameter conditions min. typ. max. unit nv hz ----------- - table 5. electrical characteristics at v cc+ = +3.3 v with v cc- = 0 v, v icm = v cc /2, t = 25 c, and r l = 10 k connected to v cc /2 (unless otherwise specified) symbol parameter conditions min. typ. max. unit dc performance v io offset voltage tsv52xa, t = 25 c 600 v tsv52xa, -40 c < t < 125 c 2400 tsv52x, t = 25 c 1.3 mv tsv52x, -40 c < t < 125 c 3.1 v io / t input offset voltage drift -40 c < t < 125 c (1) 318v/c v io long term input offset voltage drift t = 25 c (2) 0.3 i io input offset current (v out = v cc /2) t = 25 c 1 10 (3) pa -40 c < t < 125 c 1 100 (3) i ib input bias current (v out = v cc /2) t = 25 c 1 10 (3) -40 c < t < 125 c 1 100 (3) cmr common-mode rejection ratio 20 log ( v ic / v io ) v ic = -0.1 v to v cc +0.1 v, v out = v cc /2, r l = 1 m t = 25 c 51 73 db -40 c < t < 125 c 47 a vd large signal voltage gain v out = 0.5 v to (v cc - 0.5 v), r l = 1 m t = 25 c 91 106 -40 c < t < 125 c 63 v oh high level output voltage t = 25 c -40 c < t < 125 c 335 50 mv v ol low level output voltage t = 25 c -40 c < t < 125 c 735 50 i out i sink v out = v cc , t = 25 c 20 31 ma v out = v cc , -40 c < t < 125 c 17 i source v out = 0 v, t = 25 c 19 27 v out = 0 v, -40 c < t < 125 c 17 i cc supply current (per channel) v out = v cc /2, r l > 1 m t = 25 c 32 55 a -40 c < t < 125 c 32 55 v month ---------------------------
docid022743 rev 1 7/27 tsv52x, tsv52xa electrical characteristics 27 ac performance gbp gain bandwidth product r l = 10 k , c l = 100 pf 0.64 1 mhz f u unity gain frequency 900 khz m phase margin 55 degrees g m gain margin 7 db sr slew rate r l = 10 k , c l = 100 pf, v out = 0.5 v to v cc - 0.5 v 0.75 v/ s e n equivalent input noise voltage f = 1 khz f = 10 khz 60 42 thd+n total harmonic distortion + noise follower configuration, f in = 1 khz, r l = 100 k , v icm = v cc /2, bw = 22 khz, v out = 1 v pp 0.003 % table 5. electrical characteristics at v cc+ = +3.3 v with v cc- = 0 v, v icm = v cc /2, t = 25 c, and r l = 10 k connected to v cc /2 (unless otherwise specified) (continued) symbol parameter conditions min. typ. max. unit nv hz ----------- - table 6. electrical characteristics at v cc+ = +5 v with v cc- = 0 v, v icm = v cc /2, t = 25 c, and r l = 10 k connected to v cc /2 (unless otherwise specified) symbol parameter conditions min. typ. max. unit dc performance v io offset voltage tsv52xa, t = 25 c 600 v tsv52xa, -40 c < t < 125 c 2400 tsv52x, t = 25 c 1 mv tsv52x, -40 c < t < 125 c 2.8 v io / t input offset voltage drift -40 c < t < 125 c (1) 318v/c v io long term input offset voltage drift t = 25 c (2) 0.7 i io input offset current (v out = v cc /2) t = 25 c 1 10 (3) pa -40 c < t < 125 c 1 100 (3) i ib input bias current (v out = v cc /2) t = 25 c 1 10 (3) -40 c < t < 125 c 1 100 (3) cmr1 common-mode rejection ratio 20 log ( v ic / v io ) v ic = -0.1 v to v cc +0.1 v, v out = v cc /2, r l = 1 m t = 25 c 54 76 db -40 c < t < 125 c 50 cmr2 common-mode rejection ratio 20 log ( v ic / v io ) v ic = 1 v to v cc -1 v, v out = v cc /2, r l = 1 m t = 25 c 63 84 -40 c < t < 125 c 58 v month ---------------------------
electrical characteristics tsv52x, tsv52xa 8/27 docid022743 rev 1 svr supply voltage rejection ratio 20 log ( v cc / v io ) v cc = 2.7 v to 5.5 v, v out = v cc /2 t = 25 c 65 87 db -40 c < t < 125 c 60 a vd large signal voltage gain v out = 0.5 v to (v cc - 0.5 v), r l = 1 m t = 25 c 94 109 -40 c < t < 125 c 68 v oh high level output voltage t = 25 c -40 c < t < 125 c 535 50 mv v ol low level output voltage t = 25 c -40 c < t < 125 c 935 50 i out i sink v out = v cc , t = 25 c 36 55 ma v out = v cc , -40 c < t < 125 c 27 i source v out = 0 v, t = 25 c 36 55 v out = 0 v, -40 c < t < 125 c 27 i cc supply current (per channel) v out = v cc /2, r l > 1 m t = 25 c 45 60 a -40 c < t < 125 c 45 60 ac performance gbp gain bandwidth product r l = 10 k , c l = 100 pf 0.73 1.15 mhz f u unity gain frequency r l = 10 k , c l = 100 pf 900 khz m phase margin r l = 10 k , c l = 100 pf 55 degrees g m gain margin r l = 10 k , c l = 100 pf 7 db sr slew rate r l = 10 k , c l = 100 pf, v out = 0.5 v to v cc - 0.5v 0.89 v/ s e n low-frequency peak-to- peak input noise bandwidth: f = 0.1 to 10 hz 14 v pp e n equivalent input noise voltage f = 1 khz f = 10 khz 57 39 thd+n total harmonic distortion + noise follower configuration, f in = 1 khz, r l = 100 k , v icm = v cc /2, bw = 22 khz, v out = 1 v pp 0.002 % 1. see section 4.6: input offset voltage drift over temperature . 2. typical value is based on the v io drift observed after 1000 h at 125 c extrap olated to 25 c using the arrhenius law and assuming an activation energy of 0.7 ev. the operational amplifier is aged in follower mode configuration. 3. guaranteed by design. table 6. electrical characteristics at v cc+ = +5 v with v cc- = 0 v, v icm = v cc /2, t = 25 c, and r l = 10 k connected to v cc /2 (unless otherwise specified) (continued) symbol parameter conditions min. typ. max. unit nv hz ----------- -
docid022743 rev 1 9/27 tsv52x, tsv52xa electrical characteristics 27 figure 2. supply current vs. supply voltage at v icm = v cc /2 figure 3. input offset voltage distribution at v cc = 5 v, v icm = 2.5 v 9 lr glvwulexwlrqdw7 ?&iru9 && 99 lfp 9 3rsxodwlrq $0 figure 4. input offset voltage temperature coefficient distribution figure 5. input offset voltage vs. input common-mode voltage at v cc = 5 v 9 lfp 9 && 9 && 9 3rsxodwlrq $0 7 ?& 7 ?& 9 && 9 7 ?& 9 lfp 9 $0 figure 6. input offset voltage vs. temperature at v cc = 5 v figure 7. output current vs. output voltage at v cc = 2.7 v /lplwiru769; 9 && 99 lfp 9 /lplwiru769[$ $0 7 ?& 7 ?& 7 ?& 7 ?& 9 && 9 7 ?& 7 ?& 2xwsxwfxuuhqwp$ 2xwsxwyrowdjh9 $0
electrical characteristics tsv52x, tsv52xa 10/27 docid022743 rev 1 figure 8. output current vs. output voltage at v cc = 5.5 v figure 9. bode diagram at v cc = 2.7 v, r l = 10 k 7 ?& 7 ?& 7 ?& 7 ?& 9 && 9 7 ?& 7 ?& 2xwsxwfxuuhqwp$ 2xwsxwyrowdjh9 $0 *dlqg% )uhtxhqf\n+] *dlq 3kdvh 9 && 99 lfp 9* & / s)9 uo 9 && 7 ?& 7 ?& 7 ?& 3kdvh? $0 figure 10. bode diagram at v cc = 2.7 v, r l = 2 k figure 11. bode diagram at v cc = 5.5 v, r l = 10 k *dlqg% )uhtxhqf\n+] *dlq 3kdvh 9 && 99 lfp 9* & / s)9 uo 9 && 7 ?& 7 ?& 7 ?& 3kdvh? $0 *dlqg% )uhtxhqf\n+] *dlq 3kdvh 9 && 99 lfp 9* & / s)9 uo 9 && 7 ?& 7 ?& 7 ?& 3kdvh? $0 figure 12. bode diagram at v cc = 5.5 v, r l = 2 k figure 13. noise vs. frequency *dlqg% )uhtxhqf\n+] 3kdvh 9 && 99 lfp 9* & / s)9 uo 9 && 7 ?& 7 ?& 3kdvh? $0 *dlq 7 ?& )uhtxhqf\+] 9 && 99 lfp 9 7dpe ?& $0
docid022743 rev 1 11/27 tsv52x, tsv52xa electrical characteristics 27 figure 14. positive slew rate vs. supply voltage figure 15. negative slew rate vs. supply voltage & / s) 9 lq iurp9wr9 && 9 65fdofxodwhgiurpwr 7 ?& 7 ?& 7 ?& 6xsso\yrowdjh9 $0 figure 16. thd+n vs. frequency at v cc = 2.7 v figure 17. thd+n vs. frequency at v cc = 5.5 v ( 9 lq 9ss *dlq 9 lfp 9 && 7+'1 )uhtxhqf\+] $0 ( 9 lq 9 ss *dlq 9 lfp 9 && 7+'1 )uhtxhqf\+] $0 figure 18. thd+n vs. output voltage at v cc = 2.7 v figure 19. thd+n vs. output voltage at v cc = 5.5 v ( i n+] *dlq %: n+] 9 lfp 9 && 7+'1 2xwsxwyrowdjh9 ss $0 ( i n+] *dlq %: n+] 9 lfp 9 && 7+'1 2xwsxwyrowdjh9 ss $0
electrical characteristics tsv52x, tsv52xa 12/27 docid022743 rev 1 figure 20. output impedance versus frequency in closed-loop configuration 9 && 9wr9 2vfohyho 9 506 * 7 ?& 2xwsxwlpshgdqfh )uhtxhqf\n+] $0 figure 21. response to a 100 mv input step for gain = 1 at v cc = 5.5 v rising edge figure 22. response to a 100 mv input step for gain = 1 at v cc = 5.5 v falling edge v cc = 5.5 v, v icm = 2.75 v r l = 10 k , c l = 100 pf 0.5 s/div., 20 mv/div. v cc = 5.5 v, v icm = 2.75 v r l = 10 k , c l = 100 pf 0.5 s/div., 20 mv/div. figure 23. psrr vs. frequency at v cc = 2.7 v figure 24. psrr vs. frequency at v cc = 5.5 v 9 && 99 lfp 9* & / s)9 ulssoh p9 ss 3655g% )uhtxhqf\+] $0 9 && 99 lfp 9* & / s)9ulssoh p9 ss 3655g% )uhtxhqf\+] $0
docid022743 rev 1 13/27 tsv52x, tsv52xa application information 27 4 application information 4.1 operating voltages the amplifiers of the tsv52x, tsv52xa series can operate from 2.7 v to 5.5 v. their parameters are fully specified for 2.7 v, 3.3 v and 5 v power supplies. however, the parameters are very stable in the full v cc range and several characterization curves show the tsv52x, tsv52xa device characteristics at 2.7 v. additionally, the main specifications are guaranteed in extended temperature ranges from -40 to +125 c. 4.2 common-mode voltage range the tsv52x, tsv52xa devices are built with two complementary pmos and nmos input differential pairs. the devices have a rail-to-rail input and the input common-mode range is extended from v cc- - 0.1 v to v cc+ + 0.1 v. the n channel pair is active for input volt age close to the positive rail typically (v cc+ - 0.7 v) to 100 mv above the positive rail. the p channel pair is active for input voltag e close to the negative rail typically 100 mv below the negative rail to v cc- + 0.7 v. and between v cc- + 0.7 v and v cc+ - 0.7 v the both n and p pairs are active. when the both pairs work together it allows to increase the speed of the tsv52x, tsv52xa devices. this architecture improves the merit factor of the whole device. in the transition region, the performance of cmr, svr, v io ( figure 25 and figure 26 ) and thd is slightly degraded. figure 25. input offset voltage vs. input common-mode at v cc = 2.7 v figure 26. input offset voltage vs. input common-mode at v cc = 5.5 v 9 lr p9 9 lfp 9 $0 9 lr p9 9 lfp 9 $0
application information tsv52x, tsv52xa 14/27 docid022743 rev 1 4.3 rail-to-rail input the tsv52x, tsv52xa series are guaranteed without phase reversal as shown in figure 28 . it is extremely important that the current flowing in the input pin does not exceed 10 ma. in order to limit this current, a serial resistor can be added on the v in path. 4.4 rail-to-rail output the operational amplifier output levels can go close to the rails: 35 mv maximum above and below the rail when connected to a 10 k resistive load to v cc /2. 4.5 driving resistive and capacitive loads to drive high capacitive loads, adding an in series resistor at the output can improve the stability of the device (see figure 29 for the recommended in se ries value). once the in series resistor has been selected, the stability of the circuit should be tested on the bench and simulated with simulation models. the r load is placed in parallel with the capacitive load. the r load and the in series resistor create a voltage divider which introduces an error proportional to the ratio r s /r load . by keeping r s as low as possible, th is error is generally negligible. figure 27. phase reversal test schematic figure 28. no phase reversal 9 && 9 && 9 rxw 9 lqs 9 9 $0 b 9 && 9 9 lqq 9 9 rxw 9 9 lqs 9 $0
docid022743 rev 1 15/27 tsv52x, tsv52xa application information 27 figure 29. in series resistor versus capacitive load 4.6 input offset voltage drift over temperature the maximum input voltage drift over the temperature variation is defined as the offset variation related to offset value measured at 25 c. the operational amplifier is one of the main circuits of the signal conditioning chai n, and the amplifier input offset is a major contributor to the chain accuracy. the signal chain accuracy at 25 c can be compensated during production at application level. the ma ximum input voltage drift over temperature enables the system designer to anticipate the effect of temperature variations. the maximum input voltage drift over temperature is computed using equation 1 . equation 1 with t = -40 c and 125 c. the datasheet maximum value is guaranteed by a measurement on a representative sample size ensuring a c pk (process capability in dex) greate r than 1.33. 6wdeoh 0lqlpxpvhuldouhvlvwruwrehdgghgwrdjlyhq fdsdflwlyhordglqrughuwrhqvxuhvwdelolw\ 9 && 99 lfp 97 ?&5 ordg 8qvwdeoh &dsdflwlyhordgq) $0 v io t ----------- - max v io t () v io 25 c () ? t25 c ? --------------------------------------------------- =
application information tsv52x, tsv52xa 16/27 docid022743 rev 1 4.7 long term input offset voltage drift to evaluate product reliability, two ty pes of stress acceleration are used: ? voltage acceleration, by changing the applied voltage ? temperature acceleration, by changing the die temperature (below the maximum junction temperature allowed by the technology) with the ambient temperature. the voltage acceleration has been defined bas ed on jedec results, and is defined using equation 2 . equation 2 where: a fv is the voltage acceleration factor is the voltage acceleration constant in 1/v, constant technology parameter ( = 1) v s is the stress voltage used for the accelerated test v u is the voltage used for the application the temperature acceleration is driven by the arrhenius model, and is defined in equation 3 . equation 3 where: a ft is the temperature acceleration factor e a is the activation energy of the technology based on the failure rate k is the boltzmann constant (8.6173 x 10 -5 ev.k -1 ) t u is the temperature of the die when v u is used (k) t s is the temperature of the die under temperature stress (k) the final acceleration factor, a f , is the multiplication of the voltage acceleration factor and the temperature acceleration factor ( equation 4 ). equation 4 a f is calculated using the temperature and volt age defined in the mission profile of the product. the a f value can then be used in equation 5 to calculate the number of months of use equivalent to 1000 hours of reliable stress duration. a fv e v s v u ? () ? = a ft e e a k ------ 1 t u ------ 1 t s ------ ? ?? ?? ? = a f a ft a fv =
docid022743 rev 1 17/27 tsv52x, tsv52xa application information 27 equation 5 to evaluate the op-amp reliability, a fo llower stress conditio n is used where v cc is defined as a function of the maximum operating voltage and the absolute maximum rating (as recommended by jedec rules). the v io drift (in v) of the product after 1000 h of stress is tracked with parameters at different measurement conditions (see equation 6 ). equation 6 the long term drift parameter ( v io ), estimating the reli ability performance of the product, is obtained using the ratio of the v io (input offset voltage value) dr ift over the square root of the calculated number of months ( equation 7 ). equation 7 where v io drift is the measured drift value in the specified test conditions after 1000 h stress duration. 4.8 pcb layouts for correct operation, it is advised to add 10 nf decoupling capacitors as close as possible to the power supply pins. 4.9 macromodel accurate macromodels of the tsv52x, tsv52xa devices are available on stmicroelectronics? website at www.st.com . these models are a trade-off between accuracy and complexity (that is, time simu lation) of the tsv52x, tsv52xa operational amplifiers. they emulate the nominal performanc e of a typical device within the specified operating conditions mentioned in the datash eet. they also help to validate a design approach and to select the appropriate operational amplifier, but they do not replace on- board measurements . months a f 1000 h 12 months 24 h 365.25 days () ? = v cc maxv op with v icm v cc 2 ? == v io v io drift months () ------------------------------ =
package information tsv52x, tsv52xa 18/27 docid022743 rev 1 5 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack specifications, grade definitions a nd product status are available at: www.st.com . ecopack is an st trademark.
docid022743 rev 1 19/27 tsv52x, tsv52xa package information 27 5.1 sc705 package information figure 30. sc70-5 package outline table 7. sc70-5 package mechanical data ref dimensions millimeters inches min. typ. max. min. typ. max. a 0.80 1.10 0.032 0.043 a1 00.10 0.004 a2 0.80 0.90 1.00 0.032 0.035 0.039 b 0.15 0.30 0.006 0.012 c 0.10 0.22 0.004 0.009 d 1.80 2.00 2.20 0.071 0.079 0.087 e 1.80 2.10 2.40 0.071 0.083 0.094 e1 1.15 1.25 1.35 0.045 0.049 0.053 e 0.65 0.025 e1 1.30 0.051 l 0.26 0.36 0.46 0.010 0.014 0.018 < 0 8 seating plane gauge plane dimensions in mm side view top view coplanar leads
package information tsv52x, tsv52xa 20/27 docid022743 rev 1 5.2 dfn8 2x2 pack age information figure 31. dfn8 2x2x0.6, 8 pitch, 0.5 mm package outline table 8. dfn8 2x2x0. 6, 8 pitch, 0.5 mm package mechanical data ref. dimensions millimeters inches min. typ. max. min. typ. max. a 0.51 0.55 0.60 0.020 0.022 0.024 a1 0.05 0.002 a3 0.15 0.006 b 0.18 0.25 0.30 0.007 0.010 0.012 d 1.85 2.00 2.15 0.073 0.079 0.085 d2 1.45 1.60 1.70 0.057 0.063 0.067 e 1.85 2.00 2.15 0.073 0.079 0.085 e2 0.75 0.90 1.00 0.030 0.035 0.039 e 0.50 0.020 l 0.50 0.020 ddd 0.08 0.003
docid022743 rev 1 21/27 tsv52x, tsv52xa package information 27 figure 32. dfn8 2x2x0.6, 8 pitch, 0.5 mm footprint recommendation
package information tsv52x, tsv52xa 22/27 docid022743 rev 1 5.3 miniso8 package information figure 33. miniso8 package outline table 9. miniso8 package mechanical data symbol dimensions millimeters inches min. typ. max. min. typ. max. a 1.10 0.043 a1 0 0.15 0 0.006 a2 0.75 0.85 0.95 0.030 0.033 0.037 b 0.22 0.40 0.009 0.016 c 0.08 0.23 0.003 0.009 d 2.80 3.00 3.20 0.11 0.118 0.126 e 4.65 4.90 5.15 0. 183 0.193 0.203 e1 2.80 3.00 3.10 0.11 0.118 0.122 e 0.65 0.026 l 0.40 0.60 0.80 0. 016 0.024 0.031 l1 0.95 0.037 l2 0.25 0.010 k 0 8 0 8 ccc 0.10 0.004 0lql62/
docid022743 rev 1 23/27 tsv52x, tsv52xa package information 27 5.4 qfn16 3x3 package information figure 34. qfn16 3x3x0.9 mm, pad 1.7 package outline 9)431/
package information tsv52x, tsv52xa 24/27 docid022743 rev 1 figure 35. qfn16 3x3x0.9 mm, pad 1.7 footprint recommendation table 10. qfn16 3x3x0.9 mm, pad 1.7 package mechanical data symbol dimensions millimeters inches nom. min. max. nom. min. max. a 0.90 0.80 1.00 0. 035 0.032 0.039 a1 0.00 0.05 0.000 0.002 a3 0.20 0.008 b 0.18 0.30 0.007 0.012 d 3.00 2.90 3.10 0.118 0.114 0.122 d2 1.50 1.80 0.061 0.071 e 3.00 2.90 3.10 0.118 0.114 0.122 e2 1.50 1.80 0.061 0.071 e 0.50 0.020 l 0.30 0.50 0.012 0.020 4)1)3
docid022743 rev 1 25/27 tsv52x, tsv52xa package information 27 5.5 tssop14 package information figure 36. tssop14 body 4.40 mm, lead pitch 0.65 mm package outline table 11. tssop14 body 4.40 mm, lead pitch 0.65 mm package mechanical data symbol dimensions millimeters inches min. typ. max. min. typ. max. a 1.20 0.047 a1 0.05 0.15 0.002 0.004 0.006 a2 0.80 1.00 1.05 0.031 0.039 0.041 b 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 d 4.90 5.00 5.10 0.193 0.197 0.201 e 6.20 6.40 6.60 0.244 0.252 0.260 e1 4.30 4.40 4.50 0.169 0.173 0.176 e 0.65 0.0256 bsc l 0.45 0.60 0.75 l1 1.00 k 0 8 0 8 aaa 0.10 0.018 0.024 0.030 76623
ordering information tsv52x, tsv52xa 26/27 docid022743 rev 1 6 ordering information 7 revision history table 12. order codes order code temperature range package packing marking tsv521ict -40 to 125 c sc70-5 tape and reel k1g tsv522iq2t dfn8 2 x 2 k1g tsv522ist miniso8 k1g tsv524iq4t qfn16 3 x 3 k1g tsv524ipt tssop14 tsv524 tsv522iyst -40 to 125 c automotive grade (1) miniso8 k1h tsv524iypt tssop14 tsv524y tsv521aict -40 to 125 c sc70-5 k1k TSV522AIQ2T dfn8 2 x 2 k1k tsv522aist miniso8 k1k tsv524aiq4t qfn16 3 x 3 k1k tsv524aipt tssop14 tsv524a tsv522aiyst -40 to 125 c automotive grade (1) miniso8 k1l tsv524aiypt tssop14 tsv524ay 1. qualification and characterization acco rding to aec q100 and q003 or equivalent , advanced screening according to aec q001 and q 002 or equivalent. table 13. document revision history date revision changes 19-jun-2012 1 initial release. 31-jan-2014 2 updated information of related products figure 1: pin connections for each package (top view) : added footnote 1. section 4: application information : updated text to make it more readable table 12 : updated automotive footnotes
docid022743 rev 1 27/27 tsv52x, tsv52xa 27 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems wi th product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2014 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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